Added alternate function inits for USART

SHAL/Include/Core/SHAL_CORE.h

@@ -13,15 +13,7 @@
 
 //Universal structs and defines ---------------------------
 
-struct SHAL_Peripheral {
-    void* registers;
-    unsigned long global_offset;
-};
 
-struct SHAL_Peripheral_Register {
-    volatile uint32_t* reg;
-    unsigned long offset;
-};
 
 
 

SHAL/Include/Peripheral/EXT/SHAL_EXTI_CALLBACK.h

@@ -6,11 +6,11 @@
   ******************************************************************************
   */
 
-#ifndef SHMINGO_HAL_SHAL_EXTI_CALLBACK_H
-#define SHMINGO_HAL_SHAL_EXTI_CALLBACK_H
+#ifndef SHAL_EXTI_CALLBACK_H
+#define SHAL_EXTI_CALLBACK_H
 
 #include "SHAL_CORE.h"
-#include "SHAL_GPIO_REG_F072xB.h"
+#include "SHAL_GPIO_REG.h"
 
 #define DEFINE_EXTI_IRQ(EXTI_Channel)                           \
 extern "C" void EXTI##EXTI_Channel##_IRQHandler(void) {         \
@@ -38,4 +38,4 @@ typedef void (*EXTICallback)(); //Typedef for callback function
 
 void registerEXTICallback(GPIO_Key key, EXTICallback callback);
 
-#endif //SHMINGO_HAL_SHAL_EXTI_CALLBACK_H
+#endif //SHAL_EXTI_CALLBACK_H

SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG.h

@@ -2,8 +2,8 @@
 // Created by Luca on 9/6/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_GPIO_REG_H
-#define SHMINGO_HAL_SHAL_GPIO_REG_H
+#ifndef SHAL_GPIO_REG_H
+#define SHAL_GPIO_REG_H
 
 #if defined(STM32F030x6)
 #include "stm32f030x6.h"

SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_F072xB.h

@@ -2,8 +2,8 @@
 // Created by Luca on 8/29/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_GPIO_REG_F072XB_H
-#define SHMINGO_HAL_SHAL_GPIO_REG_F072XB_H
+#ifndef SHAL_GPIO_REG_F072XB_H
+#define SHAL_GPIO_REG_F072XB_H
 
 #include <stm32f072xb.h>
 #include <cassert>
@@ -31,7 +31,7 @@ enum class GPIO_Key : uint8_t {
 
 
 
-constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){
+constexpr SHAL_GPIO_Peripheral getGPIORegister(const GPIO_Key g){
     switch(g) {
         case GPIO_Key::A0: return {GPIOA,0};
         case GPIO_Key::A1: return {GPIOA,1};
@@ -84,7 +84,7 @@ constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){
         case GPIO_Key::INVALID:
         case GPIO_Key::NUM_GPIO:
             assert(false);
-            return SHAL_Peripheral(nullptr,0); //Unreachable
+            return SHAL_GPIO_Peripheral(nullptr,0); //Unreachable
     }
     __builtin_unreachable();
 }
@@ -143,7 +143,7 @@ constexpr SHAL_EXTIO_Register getGPIOEXTICR(const GPIO_Key g){
         case GPIO_Key::INVALID:
         case GPIO_Key::NUM_GPIO:
             assert(false);
-            return SHAL_EXTIO_Register(nullptr,0); //Unreachable
+            return SHAL_EXTIO_Register(nullptr,0, EXTI4_15_IRQn); //Unreachable
     }
     __builtin_unreachable();
 }

SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_TYPES.h

@@ -2,8 +2,8 @@
 // Created by Luca on 9/6/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_GPIO_TYPES_H
-#define SHMINGO_HAL_SHAL_GPIO_TYPES_H
+#ifndef SHAL_GPIO_TYPES_H
+#define SHAL_GPIO_TYPES_H
 
 #include "SHAL_CORE.h"
 
@@ -14,6 +14,16 @@ struct SHAL_EXTIO_Register{
     IRQn_Type IRQN;
 };
 
+struct SHAL_GPIO_Peripheral {
+    GPIO_TypeDef * reg;
+    unsigned long global_offset;
+};
+
+struct SHAL_Peripheral_Register {
+    volatile uint32_t* reg;
+    unsigned long offset;
+};
+
 
 
 #endif //SHMINGO_HAL_SHAL_GPIO_TYPES_H

SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h

@@ -2,8 +2,8 @@
 // Created by Luca on 8/29/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_GPIO_H
-#define SHMINGO_HAL_SHAL_GPIO_H
+#ifndef SHAL_GPIO_H
+#define SHAL_GPIO_H
 
 #include "SHAL_GPIO_REG.h"
 

SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG.h

@@ -0,0 +1,44 @@
+//
+// Created by Luca on 9/7/2025.
+//
+
+#ifndef SHMINGO_HAL_SHAL_TIM_REG_H
+#define SHMINGO_HAL_SHAL_TIM_REG_H
+
+#if defined(STM32F030x6)
+#include "stm32f030x6.h"
+#elif defined(STM32F030x8)
+#include "stm32f030x8.h"
+#elif defined(STM32F031x6)
+#include "stm32f031x6.h"
+#elif defined(STM32F038xx)
+#include "stm32f038xx.h"
+#elif defined(STM32F042x6)
+#include "stm32f042x6.h"
+#elif defined(STM32F048xx)
+#include "stm32f048xx.h"
+#elif defined(STM32F051x8)
+#include "stm32f051x8.h"
+#elif defined(STM32F058xx)
+#include "stm32f058xx.h"
+#elif defined(STM32F070x6)
+#include "stm32f070x6.h"
+#elif defined(STM32F070xB)
+#include "stm32f070xb.h"
+#elif defined(STM32F071xB)
+#include "stm32f071xb.h"
+#elif defined(STM32F072xB)
+#include "SHAL_TIM_REG_F072xB.h"
+#elif defined(STM32F078xx)
+#include "stm32f078xx.h"
+#elif defined(STM32F091xC)
+  #include "stm32f091xc.h"
+#elif defined(STM32F098xx)
+  #include "stm32f098xx.h"
+#elif defined(STM32F030xC)
+  #include "stm32f030xc.h"
+#else
+ #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
+#endif
+
+#endif //SHMINGO_HAL_SHAL_TIM_REG_H

SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG_F072xB.h

@@ -13,6 +13,7 @@
 #include <stm32f072xb.h>
 
 #include "SHAL_CORE.h"
+#include "SHAL_TIM_TYPES.h"
 
 enum class Timer_Key : uint8_t { //For STM32F072
     S_TIM1,
@@ -30,7 +31,7 @@ enum class Timer_Key : uint8_t { //For STM32F072
 
 
 //Get TIMER_KEY peripheral struct including bus register, enable mask, TIMER_KEY mask
-constexpr SHAL_Peripheral_Register getTimerRCC(Timer_Key t) {
+constexpr TIM_RCC_Enable getTimerRCC(Timer_Key t) {
     switch(t) {
         case Timer_Key::S_TIM1:  return {&RCC->APB2ENR, RCC_APB2ENR_TIM1EN_Pos};
         case Timer_Key::S_TIM2:  return {&RCC->APB1ENR, RCC_APB1ENR_TIM2EN_Pos};

SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_TYPES.h

@@ -0,0 +1,15 @@
+//
+// Created by Luca on 9/7/2025.
+//
+
+#ifndef SHMINGO_HAL_SHAL_TIM_TYPES_H
+#define SHMINGO_HAL_SHAL_TIM_TYPES_H
+
+#include "SHAL_CORE.h"
+
+struct TIM_RCC_Enable{
+    volatile uint32_t* busEnableReg;
+    uint32_t offset;
+};
+
+#endif //SHMINGO_HAL_SHAL_TIM_TYPES_H

SHAL/Include/Peripheral/Timer/SHAL_TIM_CALLBACK.h

@@ -7,10 +7,11 @@
   ******************************************************************************
   */
 
-#ifndef SHMINGO_HAL_SHAL_TIM_CALLBACK_H
-#define SHMINGO_HAL_SHAL_TIM_CALLBACK_H
+#ifndef SHAL_TIM_CALLBACK_H
+#define SHAL_TIM_CALLBACK_H
 
 #include "SHAL_CORE.h"
+#include "SHAL_TIM_REG.h"
 
 #define DEFINE_TIMER_IRQ(key, irq_handler)                \
 extern "C" void irq_handler(void) {                       \

SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG.h

@@ -2,15 +2,13 @@
 // Created by Luca on 9/7/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_UART_REG_H
-#define SHMINGO_HAL_SHAL_UART_REG_H
+#ifndef SHAL_UART_REG_H
+#define SHAL_UART_REG_H
 
 //
 // Created by Luca on 9/6/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_GPIO_REG_H
-#define SHMINGO_HAL_SHAL_GPIO_REG_H
 
 #if defined(STM32F030x6)
 #include "stm32f030x6.h"
@@ -49,9 +47,4 @@
 #endif
 
 
-
-
-#endif //SHMINGO_HAL_SHAL_GPIO_REG_H
-
-
 #endif //SHMINGO_HAL_SHAL_UART_REG_H

SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_F072xB.h

@@ -2,8 +2,8 @@
 // Created by Luca on 9/7/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_UART_REG_F072XB_H
-#define SHMINGO_HAL_SHAL_UART_REG_F072XB_H
+#ifndef SHAL_UART_REG_F072XB_H
+#define SHAL_UART_REG_F072XB_H
 
 #include <stm32f072xb.h>
 #include <cassert>
@@ -101,4 +101,17 @@ constexpr SHAL_UART_ENABLE_REG getUARTEnableReg(const UART_Pair pair){
     __builtin_unreachable();
 }
 
+constexpr uint32_t getAFMask(const AF_Mask mask){
+    switch(mask){
+        case AF_Mask::AF0: return 0x00;
+        case AF_Mask::AF1: return 0x01;
+        case AF_Mask::AF2: return 0x02;
+        case AF_Mask::AF3: return 0x03;
+        case AF_Mask::AF4: return 0x04;
+        case AF_Mask::AF5: return 0x05;
+        case AF_Mask::AF6: return 0x06;
+        case AF_Mask::AF7: return 0x07;
+    }
+}
+
 #endif //SHMINGO_HAL_SHAL_UART_REG_F072XB_H

SHAL/Include/Peripheral/UART/Reg/SHAL_UART_TYPES.h

@@ -2,21 +2,21 @@
 // Created by Luca on 9/7/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_UART_TYPES_H
-#define SHMINGO_HAL_SHAL_UART_TYPES_H
+#ifndef SHAL_UART_TYPES_H
+#define SHAL_UART_TYPES_H
 
 #include "SHAL_CORE.h"
-#include "SHAL_GPIO.h"
+#include "SHAL_GPIO_REG.h"
 
 enum class AF_Mask : uint8_t{
-    AF0 = 0x00,
-    AF1 = 0x01,
-    AF2 = 0x02,
-    AF3 = 0x03,
-    AF4 = 0x04,
-    AF5 = 0x05,
-    AF6 = 0x06,
-    AF7 = 0x07
+    AF0,
+    AF1,
+    AF2,
+    AF3,
+    AF4,
+    AF5,
+    AF6,
+    AF7
 };
 
 //Represents a pair of pins usable for USART Tx + Rx in combination, and their alternate function mapping

SHAL/Include/Peripheral/UART/SHAL_UART.h

@@ -16,11 +16,14 @@ class UART{
     friend class UARTManager;
 public:
 
+    //begins Tx and Usart TODO either modify this function or add a new one that supports Rx
+    void begin(uint32_t baudRate);
+
     //Sends a string
     void sendString(const char* s);
 
     //Sends a char
-    void sendChar(const char c);
+    void sendChar(char c);
 
 private:
 
@@ -33,11 +36,14 @@ private:
 
 };
 
+
+#define initUART(uart_pair) UARTManager::get(uart_pair)
+
 class UARTManager{
 
 public:
 
-    static UART& get(UART_Pair);
+    static UART& get(UART_Pair pair);
 
 
     UARTManager() = delete;

SHAL/Include/SHAL.h

@@ -10,5 +10,6 @@
 
 #include "SHAL_TIM.h"
 #include "SHAL_GPIO.h"
+#include "SHAL_UART.h"
 
 #endif