From b2c41e2cb4ecfa347f9f96b4e55e4b086ec86eac Mon Sep 17 00:00:00 2001 From: Luca Date: Sun, 7 Sep 2025 21:30:32 -0700 Subject: [PATCH] Added alternate function inits for USART --- .../ST/STM32F0xx/Include/system_stm32f0xx.h | 5 --- SHAL/Include/Core/SHAL_CORE.h | 8 ---- .../Peripheral/EXT/SHAL_EXTI_CALLBACK.h | 8 ++-- .../Peripheral/GPIO/Reg/SHAL_GPIO_REG.h | 4 +- .../GPIO/Reg/SHAL_GPIO_REG_F072xB.h | 10 ++--- .../Peripheral/GPIO/Reg/SHAL_GPIO_TYPES.h | 14 +++++- SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h | 4 +- .../Peripheral/Timer/Reg/SHAL_TIM_REG.h | 44 +++++++++++++++++++ .../Timer/Reg/SHAL_TIM_REG_F072xB.h | 3 +- .../Peripheral/Timer/Reg/SHAL_TIM_TYPES.h | 15 +++++++ .../Peripheral/Timer/SHAL_TIM_CALLBACK.h | 5 ++- .../Peripheral/UART/Reg/SHAL_UART_REG.h | 11 +---- .../UART/Reg/SHAL_UART_REG_F072xB.h | 17 ++++++- .../Peripheral/UART/Reg/SHAL_UART_TYPES.h | 22 +++++----- SHAL/Include/Peripheral/UART/SHAL_UART.h | 10 ++++- SHAL/Include/SHAL.h | 1 + SHAL/Src/Peripheral/GPIO/SHAL_GPIO.cpp | 12 ++--- SHAL/Src/Peripheral/Timer/SHAL_TIM.cpp | 4 +- SHAL/Src/Peripheral/UART/SHAL_UART.cpp | 44 ++++++++++++++++++- SHAL/Src/System/system_stm32f0xx.c | 5 --- SHAL/Src/main.cpp | 6 +++ 21 files changed, 182 insertions(+), 70 deletions(-) create mode 100644 SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG.h create mode 100644 SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_TYPES.h diff --git a/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h b/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h index b662b64..d098812 100644 --- a/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h +++ b/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h @@ -47,11 +47,6 @@ */ /* This variable is updated in three ways: 1) by calling CMSIS function SystemCoreClockUpdate() - 3) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) by calling HAL API function HAL_RCC_ClockConfig() - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. */ extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ diff --git a/SHAL/Include/Core/SHAL_CORE.h b/SHAL/Include/Core/SHAL_CORE.h index 65eefc4..c37cda4 100644 --- a/SHAL/Include/Core/SHAL_CORE.h +++ b/SHAL/Include/Core/SHAL_CORE.h @@ -13,15 +13,7 @@ //Universal structs and defines --------------------------- -struct SHAL_Peripheral { - void* registers; - unsigned long global_offset; -}; -struct SHAL_Peripheral_Register { - volatile uint32_t* reg; - unsigned long offset; -}; diff --git a/SHAL/Include/Peripheral/EXT/SHAL_EXTI_CALLBACK.h b/SHAL/Include/Peripheral/EXT/SHAL_EXTI_CALLBACK.h index bfbda11..8e69a19 100644 --- a/SHAL/Include/Peripheral/EXT/SHAL_EXTI_CALLBACK.h +++ b/SHAL/Include/Peripheral/EXT/SHAL_EXTI_CALLBACK.h @@ -6,11 +6,11 @@ ****************************************************************************** */ -#ifndef SHMINGO_HAL_SHAL_EXTI_CALLBACK_H -#define SHMINGO_HAL_SHAL_EXTI_CALLBACK_H +#ifndef SHAL_EXTI_CALLBACK_H +#define SHAL_EXTI_CALLBACK_H #include "SHAL_CORE.h" -#include "SHAL_GPIO_REG_F072xB.h" +#include "SHAL_GPIO_REG.h" #define DEFINE_EXTI_IRQ(EXTI_Channel) \ extern "C" void EXTI##EXTI_Channel##_IRQHandler(void) { \ @@ -38,4 +38,4 @@ typedef void (*EXTICallback)(); //Typedef for callback function void registerEXTICallback(GPIO_Key key, EXTICallback callback); -#endif //SHMINGO_HAL_SHAL_EXTI_CALLBACK_H +#endif //SHAL_EXTI_CALLBACK_H diff --git a/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG.h b/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG.h index 78e8a61..b718a01 100644 --- a/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG.h +++ b/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG.h @@ -2,8 +2,8 @@ // Created by Luca on 9/6/2025. // -#ifndef SHMINGO_HAL_SHAL_GPIO_REG_H -#define SHMINGO_HAL_SHAL_GPIO_REG_H +#ifndef SHAL_GPIO_REG_H +#define SHAL_GPIO_REG_H #if defined(STM32F030x6) #include "stm32f030x6.h" diff --git a/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_F072xB.h b/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_F072xB.h index 35567de..c76ee80 100644 --- a/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_F072xB.h +++ b/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_F072xB.h @@ -2,8 +2,8 @@ // Created by Luca on 8/29/2025. // -#ifndef SHMINGO_HAL_SHAL_GPIO_REG_F072XB_H -#define SHMINGO_HAL_SHAL_GPIO_REG_F072XB_H +#ifndef SHAL_GPIO_REG_F072XB_H +#define SHAL_GPIO_REG_F072XB_H #include #include @@ -31,7 +31,7 @@ enum class GPIO_Key : uint8_t { -constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){ +constexpr SHAL_GPIO_Peripheral getGPIORegister(const GPIO_Key g){ switch(g) { case GPIO_Key::A0: return {GPIOA,0}; case GPIO_Key::A1: return {GPIOA,1}; @@ -84,7 +84,7 @@ constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){ case GPIO_Key::INVALID: case GPIO_Key::NUM_GPIO: assert(false); - return SHAL_Peripheral(nullptr,0); //Unreachable + return SHAL_GPIO_Peripheral(nullptr,0); //Unreachable } __builtin_unreachable(); } @@ -143,7 +143,7 @@ constexpr SHAL_EXTIO_Register getGPIOEXTICR(const GPIO_Key g){ case GPIO_Key::INVALID: case GPIO_Key::NUM_GPIO: assert(false); - return SHAL_EXTIO_Register(nullptr,0); //Unreachable + return SHAL_EXTIO_Register(nullptr,0, EXTI4_15_IRQn); //Unreachable } __builtin_unreachable(); } diff --git a/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_TYPES.h b/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_TYPES.h index dd36c9f..a4fa55f 100644 --- a/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_TYPES.h +++ b/SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_TYPES.h @@ -2,8 +2,8 @@ // Created by Luca on 9/6/2025. // -#ifndef SHMINGO_HAL_SHAL_GPIO_TYPES_H -#define SHMINGO_HAL_SHAL_GPIO_TYPES_H +#ifndef SHAL_GPIO_TYPES_H +#define SHAL_GPIO_TYPES_H #include "SHAL_CORE.h" @@ -14,6 +14,16 @@ struct SHAL_EXTIO_Register{ IRQn_Type IRQN; }; +struct SHAL_GPIO_Peripheral { + GPIO_TypeDef * reg; + unsigned long global_offset; +}; + +struct SHAL_Peripheral_Register { + volatile uint32_t* reg; + unsigned long offset; +}; + #endif //SHMINGO_HAL_SHAL_GPIO_TYPES_H diff --git a/SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h b/SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h index 7925774..01cbb93 100644 --- a/SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h +++ b/SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h @@ -2,8 +2,8 @@ // Created by Luca on 8/29/2025. // -#ifndef SHMINGO_HAL_SHAL_GPIO_H -#define SHMINGO_HAL_SHAL_GPIO_H +#ifndef SHAL_GPIO_H +#define SHAL_GPIO_H #include "SHAL_GPIO_REG.h" diff --git a/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG.h b/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG.h new file mode 100644 index 0000000..6063dfd --- /dev/null +++ b/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG.h @@ -0,0 +1,44 @@ +// +// Created by Luca on 9/7/2025. +// + +#ifndef SHMINGO_HAL_SHAL_TIM_REG_H +#define SHMINGO_HAL_SHAL_TIM_REG_H + +#if defined(STM32F030x6) +#include "stm32f030x6.h" +#elif defined(STM32F030x8) +#include "stm32f030x8.h" +#elif defined(STM32F031x6) +#include "stm32f031x6.h" +#elif defined(STM32F038xx) +#include "stm32f038xx.h" +#elif defined(STM32F042x6) +#include "stm32f042x6.h" +#elif defined(STM32F048xx) +#include "stm32f048xx.h" +#elif defined(STM32F051x8) +#include "stm32f051x8.h" +#elif defined(STM32F058xx) +#include "stm32f058xx.h" +#elif defined(STM32F070x6) +#include "stm32f070x6.h" +#elif defined(STM32F070xB) +#include "stm32f070xb.h" +#elif defined(STM32F071xB) +#include "stm32f071xb.h" +#elif defined(STM32F072xB) +#include "SHAL_TIM_REG_F072xB.h" +#elif defined(STM32F078xx) +#include "stm32f078xx.h" +#elif defined(STM32F091xC) + #include "stm32f091xc.h" +#elif defined(STM32F098xx) + #include "stm32f098xx.h" +#elif defined(STM32F030xC) + #include "stm32f030xc.h" +#else + #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)" +#endif + +#endif //SHMINGO_HAL_SHAL_TIM_REG_H diff --git a/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG_F072xB.h b/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG_F072xB.h index cc6a7eb..8b373ca 100644 --- a/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG_F072xB.h +++ b/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG_F072xB.h @@ -13,6 +13,7 @@ #include #include "SHAL_CORE.h" +#include "SHAL_TIM_TYPES.h" enum class Timer_Key : uint8_t { //For STM32F072 S_TIM1, @@ -30,7 +31,7 @@ enum class Timer_Key : uint8_t { //For STM32F072 //Get TIMER_KEY peripheral struct including bus register, enable mask, TIMER_KEY mask -constexpr SHAL_Peripheral_Register getTimerRCC(Timer_Key t) { +constexpr TIM_RCC_Enable getTimerRCC(Timer_Key t) { switch(t) { case Timer_Key::S_TIM1: return {&RCC->APB2ENR, RCC_APB2ENR_TIM1EN_Pos}; case Timer_Key::S_TIM2: return {&RCC->APB1ENR, RCC_APB1ENR_TIM2EN_Pos}; diff --git a/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_TYPES.h b/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_TYPES.h new file mode 100644 index 0000000..eee07fd --- /dev/null +++ b/SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_TYPES.h @@ -0,0 +1,15 @@ +// +// Created by Luca on 9/7/2025. +// + +#ifndef SHMINGO_HAL_SHAL_TIM_TYPES_H +#define SHMINGO_HAL_SHAL_TIM_TYPES_H + +#include "SHAL_CORE.h" + +struct TIM_RCC_Enable{ + volatile uint32_t* busEnableReg; + uint32_t offset; +}; + +#endif //SHMINGO_HAL_SHAL_TIM_TYPES_H diff --git a/SHAL/Include/Peripheral/Timer/SHAL_TIM_CALLBACK.h b/SHAL/Include/Peripheral/Timer/SHAL_TIM_CALLBACK.h index 6f047c1..21226e0 100644 --- a/SHAL/Include/Peripheral/Timer/SHAL_TIM_CALLBACK.h +++ b/SHAL/Include/Peripheral/Timer/SHAL_TIM_CALLBACK.h @@ -7,10 +7,11 @@ ****************************************************************************** */ -#ifndef SHMINGO_HAL_SHAL_TIM_CALLBACK_H -#define SHMINGO_HAL_SHAL_TIM_CALLBACK_H +#ifndef SHAL_TIM_CALLBACK_H +#define SHAL_TIM_CALLBACK_H #include "SHAL_CORE.h" +#include "SHAL_TIM_REG.h" #define DEFINE_TIMER_IRQ(key, irq_handler) \ extern "C" void irq_handler(void) { \ diff --git a/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG.h b/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG.h index b80286b..ec6009c 100644 --- a/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG.h +++ b/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG.h @@ -2,15 +2,13 @@ // Created by Luca on 9/7/2025. // -#ifndef SHMINGO_HAL_SHAL_UART_REG_H -#define SHMINGO_HAL_SHAL_UART_REG_H +#ifndef SHAL_UART_REG_H +#define SHAL_UART_REG_H // // Created by Luca on 9/6/2025. // -#ifndef SHMINGO_HAL_SHAL_GPIO_REG_H -#define SHMINGO_HAL_SHAL_GPIO_REG_H #if defined(STM32F030x6) #include "stm32f030x6.h" @@ -49,9 +47,4 @@ #endif - - -#endif //SHMINGO_HAL_SHAL_GPIO_REG_H - - #endif //SHMINGO_HAL_SHAL_UART_REG_H diff --git a/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_F072xB.h b/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_F072xB.h index fbf31b4..b33ffcc 100644 --- a/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_F072xB.h +++ b/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_F072xB.h @@ -2,8 +2,8 @@ // Created by Luca on 9/7/2025. // -#ifndef SHMINGO_HAL_SHAL_UART_REG_F072XB_H -#define SHMINGO_HAL_SHAL_UART_REG_F072XB_H +#ifndef SHAL_UART_REG_F072XB_H +#define SHAL_UART_REG_F072XB_H #include #include @@ -101,4 +101,17 @@ constexpr SHAL_UART_ENABLE_REG getUARTEnableReg(const UART_Pair pair){ __builtin_unreachable(); } +constexpr uint32_t getAFMask(const AF_Mask mask){ + switch(mask){ + case AF_Mask::AF0: return 0x00; + case AF_Mask::AF1: return 0x01; + case AF_Mask::AF2: return 0x02; + case AF_Mask::AF3: return 0x03; + case AF_Mask::AF4: return 0x04; + case AF_Mask::AF5: return 0x05; + case AF_Mask::AF6: return 0x06; + case AF_Mask::AF7: return 0x07; + } +} + #endif //SHMINGO_HAL_SHAL_UART_REG_F072XB_H diff --git a/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_TYPES.h b/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_TYPES.h index 30de033..1220373 100644 --- a/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_TYPES.h +++ b/SHAL/Include/Peripheral/UART/Reg/SHAL_UART_TYPES.h @@ -2,21 +2,21 @@ // Created by Luca on 9/7/2025. // -#ifndef SHMINGO_HAL_SHAL_UART_TYPES_H -#define SHMINGO_HAL_SHAL_UART_TYPES_H +#ifndef SHAL_UART_TYPES_H +#define SHAL_UART_TYPES_H #include "SHAL_CORE.h" -#include "SHAL_GPIO.h" +#include "SHAL_GPIO_REG.h" enum class AF_Mask : uint8_t{ - AF0 = 0x00, - AF1 = 0x01, - AF2 = 0x02, - AF3 = 0x03, - AF4 = 0x04, - AF5 = 0x05, - AF6 = 0x06, - AF7 = 0x07 + AF0, + AF1, + AF2, + AF3, + AF4, + AF5, + AF6, + AF7 }; //Represents a pair of pins usable for USART Tx + Rx in combination, and their alternate function mapping diff --git a/SHAL/Include/Peripheral/UART/SHAL_UART.h b/SHAL/Include/Peripheral/UART/SHAL_UART.h index 1283129..c8f9f58 100644 --- a/SHAL/Include/Peripheral/UART/SHAL_UART.h +++ b/SHAL/Include/Peripheral/UART/SHAL_UART.h @@ -16,11 +16,14 @@ class UART{ friend class UARTManager; public: + //begins Tx and Usart TODO either modify this function or add a new one that supports Rx + void begin(uint32_t baudRate); + //Sends a string void sendString(const char* s); //Sends a char - void sendChar(const char c); + void sendChar(char c); private: @@ -33,11 +36,14 @@ private: }; + +#define initUART(uart_pair) UARTManager::get(uart_pair) + class UARTManager{ public: - static UART& get(UART_Pair); + static UART& get(UART_Pair pair); UARTManager() = delete; diff --git a/SHAL/Include/SHAL.h b/SHAL/Include/SHAL.h index 3b404b3..9756334 100644 --- a/SHAL/Include/SHAL.h +++ b/SHAL/Include/SHAL.h @@ -10,5 +10,6 @@ #include "SHAL_TIM.h" #include "SHAL_GPIO.h" +#include "SHAL_UART.h" #endif diff --git a/SHAL/Src/Peripheral/GPIO/SHAL_GPIO.cpp b/SHAL/Src/Peripheral/GPIO/SHAL_GPIO.cpp index ce2edfb..2783ad4 100644 --- a/SHAL/Src/Peripheral/GPIO/SHAL_GPIO.cpp +++ b/SHAL/Src/Peripheral/GPIO/SHAL_GPIO.cpp @@ -31,9 +31,9 @@ GPIO::GPIO() : m_GPIO_KEY(GPIO_Key::INVALID){ GPIO::GPIO(GPIO_Key key, PinMode pinMode) : m_GPIO_KEY(key) { - SHAL_Peripheral gpioPeripheral = getGPIORegister(key); + SHAL_GPIO_Peripheral gpioPeripheral = getGPIORegister(key); - auto gpioRegister = static_cast(gpioPeripheral.registers); + auto gpioRegister = gpioPeripheral.reg; unsigned long registerOffset = gpioPeripheral.global_offset; volatile unsigned long* gpioEnable = getGPIORCCEnable(key).reg; @@ -47,17 +47,17 @@ GPIO::GPIO(GPIO_Key key, PinMode pinMode) : m_GPIO_KEY(key) { void GPIO::setLow() { auto gpioPeripheral = getGPIORegister(m_GPIO_KEY); - static_cast(gpioPeripheral.registers)->ODR &= ~(1 << gpioPeripheral.global_offset); + gpioPeripheral.reg->ODR &= ~(1 << gpioPeripheral.global_offset); } void GPIO::setHigh() { auto gpioPeripheral = getGPIORegister(m_GPIO_KEY); - static_cast(gpioPeripheral.registers)->ODR |= (1 << gpioPeripheral.global_offset); + gpioPeripheral.reg->ODR |= (1 << gpioPeripheral.global_offset); } void GPIO::toggle() volatile { - auto gpioPeripheral = getGPIORegister(m_GPIO_KEY); - static_cast(gpioPeripheral.registers)->ODR ^= (1 << gpioPeripheral.global_offset); + SHAL_GPIO_Peripheral gpioPeripheral = getGPIORegister(m_GPIO_KEY); + gpioPeripheral.reg->ODR ^= (1 << gpioPeripheral.global_offset); } diff --git a/SHAL/Src/Peripheral/Timer/SHAL_TIM.cpp b/SHAL/Src/Peripheral/Timer/SHAL_TIM.cpp index 72538a5..fa0601d 100644 --- a/SHAL/Src/Peripheral/Timer/SHAL_TIM.cpp +++ b/SHAL/Src/Peripheral/Timer/SHAL_TIM.cpp @@ -6,8 +6,8 @@ #include Timer::Timer(Timer_Key t) : TIMER_KEY(t){ - SHAL_Peripheral_Register rcc = getTimerRCC(TIMER_KEY); - *rcc.reg |= (1 << rcc.offset); + TIM_RCC_Enable rcc = getTimerRCC(TIMER_KEY); + *rcc.busEnableReg |= (1 << rcc.offset); } Timer::Timer() : TIMER_KEY(Timer_Key::S_TIM_INVALID){ diff --git a/SHAL/Src/Peripheral/UART/SHAL_UART.cpp b/SHAL/Src/Peripheral/UART/SHAL_UART.cpp index 881ebf6..23feb3d 100644 --- a/SHAL/Src/Peripheral/UART/SHAL_UART.cpp +++ b/SHAL/Src/Peripheral/UART/SHAL_UART.cpp @@ -10,7 +10,7 @@ #include "SHAL_UART.h" #include "SHAL_GPIO.h" -UART::UART(const UART_Pair pair){ +UART::UART(const UART_Pair pair) : m_UARTPair(pair){ SHAL_UART_Pair uart_pair = getUARTPair(pair); //Get the UART_PAIR information to be initialized //Get the GPIO pins for this UART setup @@ -20,15 +20,55 @@ UART::UART(const UART_Pair pair){ initGPIO(Tx_Key,PinMode::ALTERNATE_FUNCTION_MODE); //Initialize Tx GPIO with alternate function (initializes GPIO port as well) initGPIO(Rx_Key,PinMode::ALTERNATE_FUNCTION_MODE); //Initialize Rx GPIO with alternate function + //Determine which AFR register (high or low) to write depending on pin + uint8_t TxAFR = getGPIORegister(Tx_Key).global_offset < 8 ? 0 : 1; //Use AFR[0] if pin < 8, AFR[1] if pin >= 8 + uint8_t RxAFR = getGPIORegister(Rx_Key).global_offset < 8 ? 0 : 1; + + //Apply Alternate Function masks to the AFR registers for each GPIO to enable alternate functions + getGPIORegister(Tx_Key).reg->AFR[TxAFR] |= getAFMask(uart_pair.TxMask); + getGPIORegister(Rx_Key).reg->AFR[RxAFR] |= getAFMask(uart_pair.RxMask); + SHAL_UART_ENABLE_REG pairUARTEnable = getUARTEnableReg(pair); //Register and mask to enable the UART channel *pairUARTEnable.reg |= pairUARTEnable.mask; //Enable UART line } +void UART::begin(uint32_t baudRate) { + + USART_TypeDef* usart = getUARTPair(m_UARTPair).USARTReg; + + usart->CR1 &= ~USART_CR1_UE; //Disable USART + + usart->CR1 = 0; //Clear USART config + + usart->CR1 = USART_CR1_TE | USART_CR1_RE; //Tx enable and Rx Enable + + usart->BRR = 48000000 / baudRate; //MAKE SURE ANY FUNCTION THAT CHANGES CLOCK UPDATES THIS! + + usart->CR1 |= USART_CR1_UE; + +} + +void UART::sendString(const char *s) { + while (*s) sendChar(*s++); //Send chars while we haven't reached end of s +} + +void UART::sendChar(char c) { + + USART_TypeDef* usart = getUARTPair(m_UARTPair).USARTReg; + + while(!(usart->ISR & USART_ISR_TXE)); //Wait for usart to finish what it's doing + + usart->TDR = c; //Send character +} + + + UART& UARTManager::get(UART_Pair pair) { - //Perform logic for reassigning UART object in array + //Always reassign since we could be changing to different pins for some reason + m_UARTs[getUARTChannel(pair)] = UART(pair); return m_UARTs[getUARTChannel(pair)]; } diff --git a/SHAL/Src/System/system_stm32f0xx.c b/SHAL/Src/System/system_stm32f0xx.c index 51f79db..3e3c6fe 100644 --- a/SHAL/Src/System/system_stm32f0xx.c +++ b/SHAL/Src/System/system_stm32f0xx.c @@ -91,11 +91,6 @@ */ /* This variable is updated in three ways: 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. */ uint32_t SystemCoreClock = 8000000; diff --git a/SHAL/Src/main.cpp b/SHAL/Src/main.cpp index 773b294..ce78af1 100644 --- a/SHAL/Src/main.cpp +++ b/SHAL/Src/main.cpp @@ -17,6 +17,11 @@ void tim2Handler(){ } int main() { + + UART uart2 = initUART(UART_Pair::Tx2A2_Rx2A3); + + uart2.begin(115200); + RCC->AHBENR |= RCC_AHBENR_GPIOBEN; Timer timer2 = getTimer(Timer_Key::S_TIM2); @@ -43,5 +48,6 @@ int main() { while (true) { __WFI(); + uart2.sendString("Hello\r\n"); } }