Finished Timer IRQ abstraction
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@@ -2,25 +2,25 @@
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// Created by Luca on 8/28/2025.
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//
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#ifndef SHMINGO_HAL_SHAL_TIMER_CALLBACK_H
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#define SHMINGO_HAL_SHAL_TIMER_CALLBACK_H
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#ifndef SHMINGO_HAL_SHAL_TIM_CALLBACK_H
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#define SHMINGO_HAL_SHAL_TIM_CALLBACK_H
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#include "SHAL_TIM_REG.h"
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#define DEFINE_TIMER_IRQ(key, irq_handler) \
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extern "C" void irq_handler(void) { \
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auto tim_reg = getTimerRegister(key) \
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auto tim_reg = getTimerRegister(key); \
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if (tim_reg->SR & TIM_SR_UIF) { \
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tim_reg->SR &= ~TIM_SR_UIF; /* clear flag */ \
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auto cb = timer_callbacks[static_cast<int>(key)]; \
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if (cb) cb(); \
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} \
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}
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}; \
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};
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typedef void (*TimerCallback)(); //Typedef for callback function
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static TimerCallback timer_callbacks[static_cast<int>(Timer_Key::NUM_TIMERS)] = {nullptr}; //Timer IRQ Callback table
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[[maybe_unused]] static TimerCallback timer_callbacks[static_cast<int>(Timer_Key::NUM_TIMERS)] = {nullptr}; //Timer IRQ Callback table
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void registerTimerCallback(Timer_Key key, TimerCallback callback);
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#endif //SHMINGO_HAL_SHAL_TIMER_CALLBACK_H
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#endif //SHMINGO_HAL_SHAL_TIM_CALLBACK_H
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@@ -7,7 +7,8 @@
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enum class Bus {
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AHB,
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APB1,
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APB2
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APB2,
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INVALID
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};
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struct RCC_Peripheral {
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@@ -23,9 +24,11 @@ enum class Timer_Key { //For STM32F072
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S_TIM14,
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S_TIM15,
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S_TIM16,
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S_TIM17
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S_TIM17,
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NUM_TIMERS
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};
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//Get timer peripheral struct including bus register, enable mask, timer mask
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constexpr RCC_Peripheral getTimerRCC(Timer_Key t) {
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switch(t) {
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@@ -36,6 +39,7 @@ constexpr RCC_Peripheral getTimerRCC(Timer_Key t) {
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case Timer_Key::S_TIM15: return {Bus::APB2, &RCC->APB2ENR, RCC_APB2ENR_TIM15EN};
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case Timer_Key::S_TIM16: return {Bus::APB2, &RCC->APB2ENR, RCC_APB2ENR_TIM16EN};
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case Timer_Key::S_TIM17: return {Bus::APB2, &RCC->APB2ENR, RCC_APB2ENR_TIM17EN};
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case Timer_Key::NUM_TIMERS: return {Bus::INVALID, nullptr, 0};;
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}
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return {Bus::APB2, &RCC->APB2ENR, RCC_APB2ENR_TIM1EN};
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@@ -51,6 +55,7 @@ constexpr volatile TIM_TypeDef* getTimerRegister(Timer_Key t) {
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case Timer_Key::S_TIM15: return TIM15;
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case Timer_Key::S_TIM16: return TIM16;
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case Timer_Key::S_TIM17: return TIM17;
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case Timer_Key::NUM_TIMERS: return nullptr;
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}
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return TIM1;
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}
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@@ -64,6 +69,7 @@ constexpr IRQn_Type getIRQn(Timer_Key t) {
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case Timer_Key::S_TIM15: return TIM15_IRQn;
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case Timer_Key::S_TIM16: return TIM16_IRQn;
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case Timer_Key::S_TIM17: return TIM17_IRQn;
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case Timer_Key::NUM_TIMERS: return TIM1_BRK_UP_TRG_COM_IRQn;
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}
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return TIM1_BRK_UP_TRG_COM_IRQn;
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}
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@@ -2,8 +2,7 @@
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#define SHAL_TIM_H
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#include "SHAL_TIM_REG.h"
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#include "SHAL_TIM_CALLBACK.h"
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class Timer {
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public:
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@@ -16,12 +15,20 @@ public:
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//Stops the counter
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void stop();
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//Set prescaler value
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void setPrescaler(uint16_t presc);
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//Set auto reload register
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void setARR(uint16_t arr);
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//Enable interrupts
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void enableInterrupt();
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//Set timer IRQ callback function
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void setCallbackFunc(TimerCallback callback){
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registerTimerCallback(timer, callback);
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}
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private:
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Timer_Key timer;
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@@ -11,6 +11,8 @@ Timer::Timer(Timer_Key t) : timer(t), timer_reg(getTimerRegister(t)){
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void Timer::start() {
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timer_reg->CR1 |= TIM_CR1_CEN;
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timer_reg->EGR |= TIM_EGR_UG; //load prescaler reg and ARR
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enableInterrupt();
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}
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void Timer::stop() {
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@@ -2,7 +2,15 @@
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// Created by Luca on 8/28/2025.
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//
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#include "SHAL_TIMER_CALLBACK.h"
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#include "SHAL_TIM_CALLBACK.h"
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DEFINE_TIMER_IRQ(Timer_Key::S_TIM1, TIM1_BRK_UP_TRG_COM_IRQHandler)
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DEFINE_TIMER_IRQ(Timer_Key::S_TIM2, TIM2_IRQHandler)
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DEFINE_TIMER_IRQ(Timer_Key::S_TIM3, TIM3_IRQHandler)
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DEFINE_TIMER_IRQ(Timer_Key::S_TIM14, TIM14_IRQHandler)
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DEFINE_TIMER_IRQ(Timer_Key::S_TIM15, TIM15_IRQHandler)
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DEFINE_TIMER_IRQ(Timer_Key::S_TIM16, TIM16_IRQHandler)
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DEFINE_TIMER_IRQ(Timer_Key::S_TIM17, TIM17_IRQHandler)
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void registerTimerCallback(Timer_Key key, TimerCallback callback){
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timer_callbacks[static_cast<int>(key)] = callback;
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@@ -1,16 +1,6 @@
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#include "SHAL.h"
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#include "stm32f0xx.h"
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volatile int prev_button = false;
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volatile int curr_button = false;
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extern "C" void TIM2_IRQHandler(void){
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if(TIM2->SR & TIM_SR_UIF){
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TIM2->SR &= ~TIM_SR_UIF;
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GPIOA->ODR ^= (1 << 4);
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}
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}
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extern "C" void EXTI0_1_IRQHandler(void) {
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if (EXTI->PR & (1 << 0)) { //Check pending flag
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EXTI->PR |= (1 << 0); //Clear it by writing 1
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@@ -18,16 +8,24 @@ extern "C" void EXTI0_1_IRQHandler(void) {
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}
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}
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void tim2Handler(){
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GPIOA->ODR ^= (1 << 4);
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}
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int main() {
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RCC->AHBENR |= RCC_AHBENR_GPIOAEN;
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RCC->AHBENR |= RCC_AHBENR_GPIOBEN;
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RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
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auto timer2 = Timer(Timer_Key::S_TIM2);
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timer2.setPrescaler(8000 - 1);
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timer2.setARR(250 - 1);
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timer2.setCallbackFunc(tim2Handler);
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timer2.start();
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; // Enable SYSCFG clock (needed for EXTI)
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TIM2->EGR |= TIM_EGR_UG; //Force update to load PSC/ARR
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GPIOA->MODER &= ~(0b11 << (4 * 2));
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GPIOA->MODER |= (0b1 << (4 * 2));
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@@ -37,21 +35,12 @@ int main() {
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GPIOB->MODER &= ~(0x3 << (0 * 2));
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GPIOB->MODER |= (0x0 << (0 * 2));
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TIM2->PSC = 8000 - 1; //8MHz base, prescaler
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TIM2->ARR = 500 - 1; //500ms, auto reload register
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SYSCFG->EXTICR[0] &= ~SYSCFG_EXTICR1_EXTI0; // Clear EXTI0 mapping
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SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PB; // Map PA0 -> EXTI0
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EXTI->IMR |= (1 << 0); // Unmask EXTI0
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EXTI->RTSR |= (1 << 0); // Trigger on rising edge
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TIM2->DIER |= TIM_DIER_UIE; //Interrupt register
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TIM2->CR1 |= TIM_CR1_CEN; //Counter enable
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NVIC_EnableIRQ(TIM2_IRQn);
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NVIC_EnableIRQ(EXTI0_1_IRQn); // EXTI lines 0 and 1 share an IRQ vector
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__enable_irq();
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