133 lines
4.2 KiB
C++
133 lines
4.2 KiB
C++
//
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// Created by Luca on 8/30/2025.
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//
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#include "SHAL_GPIO.h"
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//#include "SHAL_EXTI_CALLBACK.h"
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SHAL_GPIO::SHAL_GPIO() : m_GPIO_KEY(GPIO_Key::INVALID){
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//Do not initialize anything
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}
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SHAL_GPIO::SHAL_GPIO(GPIO_Key key) : m_GPIO_KEY(key) {
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auto GPIORCCEnable = getGPIORCCEnable(key);
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SHAL_set_register_value(GPIORCCEnable.reg,GPIORCCEnable.mask);
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}
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void SHAL_GPIO::setLow() {
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auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
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SHAL_set_bits(outputDataReg.reg,1,0,outputDataReg.offset);
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}
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void SHAL_GPIO::setHigh() {
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auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
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SHAL_set_bits(outputDataReg.reg,1,1,outputDataReg.offset);
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}
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void SHAL_GPIO::toggle() volatile {
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auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
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SHAL_flip_bits(outputDataReg.reg,1,outputDataReg.offset);
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}
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void SHAL_GPIO::setOutputType(PinType type) volatile {
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auto outputTypeReg = getGPIOOutputTypeRegister(m_GPIO_KEY);
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SHAL_set_bits(outputTypeReg.reg,2,static_cast<uint8_t>(type),outputTypeReg.offset);
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}
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void SHAL_GPIO::setOutputSpeed(OutputSpeed speed) volatile {
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auto outputSpeedReg = getGPIOOutputSpeedRegister(m_GPIO_KEY);
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SHAL_set_bits(outputSpeedReg.reg,2,static_cast<uint8_t>(speed),outputSpeedReg.offset);
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}
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void SHAL_GPIO::setInternalResistor(InternalResistorType type) volatile {
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auto pupdreg = getGPIOPUPDRegister(m_GPIO_KEY);
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SHAL_set_bits(pupdreg.reg,2,static_cast<uint8_t>(type),pupdreg.offset);
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}
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void SHAL_GPIO::setAlternateFunction(GPIO_Alternate_Function AF) volatile {
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auto alternateFunctionReg = getGPIOAlternateFunctionRegister(m_GPIO_KEY);
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SHAL_set_bits(alternateFunctionReg.reg,4,static_cast<uint8_t>(AF),alternateFunctionReg.offset);
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}
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SHAL_Result SHAL_GPIO::setPinMode(PinMode mode) volatile {
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auto pinModeReg = getGPIOModeRegister(m_GPIO_KEY);
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/*
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if(mode == PinMode::ANALOG_MODE && getGPIOPortInfo(m_GPIO_KEY).ADCChannel == SHAL_ADC_Channel::NO_ADC_MAPPING){
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char buff[100];
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sprintf(buff, "Error: GPIO pin %d has no valid ADC mapping\r\n", static_cast<uint8_t>(m_GPIO_KEY));
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SHAL_UART2.sendString(buff);
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return SHAL_Result::ERROR;
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}
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*/
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SHAL_set_bits(pinModeReg.reg,2,static_cast<uint8_t>(mode),pinModeReg.offset); //Set mode
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return SHAL_Result::OKAY;
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}
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/* TODO Fix implementation for STM32F072
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void SHAL_GPIO::useAsExternalInterrupt(TriggerMode mode, EXTICallback callback) {
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uint32_t gpioPin = getGPIORegister(m_GPIO_KEY).global_offset; //Use existing structs to get offset
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setPinMode(PinMode::INPUT_MODE); //Explicitly set mode to input
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGCOMPEN; //Enable EXT, TODO check if this is different across STM32 models
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NVIC_EnableIRQ(getGPIOEXTICR(m_GPIO_KEY).IRQN); //Enable IRQN for pin
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EXTI->IMR |= (1 << gpioPin); //Enable correct EXTI line
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SHAL_EXTIO_Register EXTILineEnable = getGPIOEXTICR(m_GPIO_KEY);
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*EXTILineEnable.EXT_ICR |= EXTILineEnable.mask; //Set bits to enable correct port on correct line TODO Find way to clear bits before
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uint32_t rising_mask = 0x00;
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uint32_t falling_mask = 0x00;
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//Set rising and falling edge triggers based on pin offset (enabled EXTI line)
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switch(mode){
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case TriggerMode::RISING_EDGE:
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rising_mask = 1 << gpioPin;
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break;
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case TriggerMode::FALLING_EDGE:
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falling_mask = 1 << gpioPin;
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break;
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case TriggerMode::RISING_FALLING_EDGE:
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falling_mask = 1 << gpioPin;
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falling_mask = 1 << gpioPin;
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}
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//Set triggers
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EXTI->RTSR |= rising_mask;
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EXTI->FTSR |= falling_mask;
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//Set callback
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registerEXTICallback(m_GPIO_KEY,callback);
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__enable_irq(); //Enable IRQ just in case
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}
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*/
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/* TODO reimplement
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uint16_t SHAL_GPIO::analogRead(SHAL_ADC_SampleTime sampleTime) {
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SHAL_ADC_Channel channel = getGPIOPortInfo(m_GPIO_KEY).ADCChannel;
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return GPIOManager::getGPIOADC().singleConvertSingle(channel,sampleTime);
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}
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*/
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SHAL_GPIO& GPIOManager::get(GPIO_Key key) {
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unsigned int gpioPort = getGPIOPortNumber(key);
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uint8_t gpioPin = getGPIOPinNumber(key);
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if (m_gpios[gpioPort][gpioPin].m_GPIO_KEY == GPIO_Key::INVALID){
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m_gpios[gpioPort][gpioPin] = SHAL_GPIO(key);
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}
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return m_gpios[gpioPort][gpioPin];
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}
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