Finish project
This commit is contained in:
@@ -83,14 +83,14 @@ static inline SHAL_ADC_Control_Reg getADCControlReg(ADC_Key key) {
|
||||
|
||||
static inline SHAL_ADC_Config_Reg getADCConfigReg(ADC_Key key) {
|
||||
|
||||
SHAL_ADC_Config_Reg res = {nullptr, ADC_CFGR_CONT, ADC_CFGR_RES_Pos, ADC_CFGR_ALIGN_Pos};
|
||||
SHAL_ADC_Config_Reg res = {nullptr, ADC_CFGR_CONT, ADC_CFGR_RES_Pos, ADC_CFGR_ALIGN_Pos, ADC_CFGR_CONT_Msk};
|
||||
|
||||
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->CFGR);
|
||||
return res;
|
||||
}
|
||||
|
||||
static inline SHAL_ADC_ISR_Reg getADCISRReg(ADC_Key key){
|
||||
SHAL_ADC_ISR_Reg res = {nullptr, ADC_ISR_EOC, ADC_ISR_EOS, ADC_ISR_ADRDY};
|
||||
SHAL_ADC_ISR_Reg res = {nullptr, ADC_ISR_EOC, ADC_ISR_EOS, ADC_ISR_ADRDY, ADC_ISR_OVR};
|
||||
|
||||
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->ISR);
|
||||
return res;
|
||||
|
||||
@@ -39,6 +39,7 @@ struct SHAL_ADC_Config_Reg {
|
||||
|
||||
uint32_t resolution_offset;
|
||||
uint32_t alignment_offset;
|
||||
uint32_t continuous_mode_mask;
|
||||
};
|
||||
|
||||
//Register for all ADC data
|
||||
@@ -53,6 +54,7 @@ struct SHAL_ADC_ISR_Reg {
|
||||
uint32_t end_of_conversion_mask;
|
||||
uint32_t end_of_sequence_mask;
|
||||
uint32_t ready_mask;
|
||||
uint32_t overrun_mask;
|
||||
};
|
||||
|
||||
//Register controlling the clock source for the ADC
|
||||
|
||||
Reference in New Issue
Block a user