Finish project

This commit is contained in:
Ea-r-th
2025-11-11 19:51:21 -08:00
parent b50e7c25f6
commit ec0fea608b
7 changed files with 152 additions and 110 deletions

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@@ -83,14 +83,14 @@ static inline SHAL_ADC_Control_Reg getADCControlReg(ADC_Key key) {
static inline SHAL_ADC_Config_Reg getADCConfigReg(ADC_Key key) {
SHAL_ADC_Config_Reg res = {nullptr, ADC_CFGR_CONT, ADC_CFGR_RES_Pos, ADC_CFGR_ALIGN_Pos};
SHAL_ADC_Config_Reg res = {nullptr, ADC_CFGR_CONT, ADC_CFGR_RES_Pos, ADC_CFGR_ALIGN_Pos, ADC_CFGR_CONT_Msk};
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->CFGR);
return res;
}
static inline SHAL_ADC_ISR_Reg getADCISRReg(ADC_Key key){
SHAL_ADC_ISR_Reg res = {nullptr, ADC_ISR_EOC, ADC_ISR_EOS, ADC_ISR_ADRDY};
SHAL_ADC_ISR_Reg res = {nullptr, ADC_ISR_EOC, ADC_ISR_EOS, ADC_ISR_ADRDY, ADC_ISR_OVR};
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->ISR);
return res;

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@@ -39,6 +39,7 @@ struct SHAL_ADC_Config_Reg {
uint32_t resolution_offset;
uint32_t alignment_offset;
uint32_t continuous_mode_mask;
};
//Register for all ADC data
@@ -53,6 +54,7 @@ struct SHAL_ADC_ISR_Reg {
uint32_t end_of_conversion_mask;
uint32_t end_of_sequence_mask;
uint32_t ready_mask;
uint32_t overrun_mask;
};
//Register controlling the clock source for the ADC

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@@ -17,15 +17,15 @@
//Build enum map of available SHAL_GPIO pins
enum class GPIO_Key : uint8_t {
A0,
A1,
A2,
A3,
A4,
A5,
A6,
A7,
A8,
A0 = 0,
A1 = 1,
A2 = 2,
A3 = 3,
A4 = 4,
A5 = 5,
A6 = 6,
A7 = 7,
A8 = 8,
A9,
A10,
A11,
@@ -124,7 +124,7 @@ constexpr uint32_t getGPIOPortNumber(const GPIO_Key g){
static inline SHAL_GPIO_Mode_Register getGPIOModeRegister(const GPIO_Key key){
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->MODER;
uint32_t offset = 2 * static_cast<uint8_t>(key) % 16;
uint32_t offset = 2 * (static_cast<uint8_t>(key) % 16);
return {reg,offset};
}
@@ -158,7 +158,7 @@ static inline SHAL_GPIO_Output_Type_Register getGPIOOutputTypeRegister(const GPI
static inline SHAL_GPIO_Output_Data_Register getGPIOOutputDataRegister(const GPIO_Key key){
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->ODR;
uint32_t offset = static_cast<uint8_t>(key) % 16;
uint32_t offset = (static_cast<uint8_t>(key) % 16);
return {reg,offset};
}

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@@ -21,7 +21,7 @@ public:
/// Initializes a timer
/// \param prescaler The amount of times the base clock has to cycle before the timer adds one to the count
/// \param autoReload The number of timer counts before the count is reset and IRQ is called
void init(uint32_t prescaler, uint32_t autoReload);
void init(uint16_t prescaler, uint16_t autoReload);
//Starts the counter
void start();