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Fixed PWM mode

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This commit is contained in:
Ea-r-th
2025-11-06 00:41:46 -08:00
parent 12aedf1ff9
commit a1458de235
6 changed files with 93 additions and 28 deletions
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4
SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_L432KC.h
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@@ -58,7 +58,7 @@ enum class GPIO_Alternate_Function_Mapping {
A11_TIM1CH4 = 0x01,
A12_TIM1ETR = 0x01,
A15_TIM2CH1 = 0x01,
B0_TIM2CH2N = 0x01,
B0_TIM1CH2N = 0x01,
B1_TIM1CH3N = 0x01,
};
@@ -132,7 +132,7 @@ static inline SHAL_GPIO_Pullup_Pulldown_Register getGPIOPUPDRegister(const GPIO_
static inline SHAL_GPIO_Alternate_Function_Register getGPIOAlternateFunctionRegister(const GPIO_Key key){
uint32_t pinNumber = static_cast<uint8_t>(key); //Number of pin (We need 0-7 to be AFR 1 and 8-15 to be AFR 2)
uint32_t pinNumber = static_cast<uint8_t>(key) % 16; //Number of pin (We need 0-7 to be AFR 1 and 8-15 to be AFR 2)
uint32_t afrIndex = pinNumber < 8 ? 0 : 1;
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->AFR[afrIndex];

14
SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG_L432KC.h
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@@ -158,15 +158,15 @@ getTimerCaptureCompareModeRegistersOutput(Timer_Key key) {
SHAL_TIM_Capture_Compare_Mode_Registers_Output res = {
{nullptr, nullptr},
TIM_CCMR1_CC1S_Pos, //Channel 1 Capture/Compare selection
TIM_CCMR1_OC1FE_Pos, //Channel 1 Fast enable
TIM_CCMR1_OC1PE_Pos, //Channel 1 Preload enable
TIM_CCMR1_OC1FE, //Channel 1 Fast enable
TIM_CCMR1_OC1PE, //Channel 1 Preload enable
TIM_CCMR1_OC1M_Pos, //Channel 1 Mode (OC1M)
TIM_CCMR1_OC1CE_Pos, //Channel 1 Clear enable
TIM_CCMR1_OC1CE, //Channel 1 Clear enable
TIM_CCMR1_CC2S_Pos, //Channel 2 Capture/Compare selection
TIM_CCMR1_OC2FE_Pos, //Channel 2 Fast enable
TIM_CCMR1_OC2PE_Pos, //Channel 2 Preload enable
TIM_CCMR1_OC2FE, //Channel 2 Fast enable
TIM_CCMR1_OC2PE, //Channel 2 Preload enable
TIM_CCMR1_OC2M_Pos, //Channel 2 Mode (OC2M)
TIM_CCMR1_OC2CE_Pos //Channel 2 Clear enable
TIM_CCMR1_OC2CE //Channel 2 Clear enable
};
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
@@ -176,7 +176,7 @@ getTimerCaptureCompareModeRegistersOutput(Timer_Key key) {
return res;
}
static inline SHAL_TIM_Break_Dead_Time_Register getBreakDeadTimeRegister(Timer_Key key){
static inline SHAL_TIM_Break_Dead_Time_Register getTimerBreakDeadTimeRegister(Timer_Key key){
SHAL_TIM_Break_Dead_Time_Register res = {nullptr, 1UL << 15};

7
SHAL/Include/Peripheral/Timer/SHAL_TIM.h
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@@ -38,7 +38,11 @@ public:
//Enable interrupts
void enableInterrupt();
void setPWMMode(SHAL_Timer_Channel channel, SHAL_Timer_Channel_Main_Output_Mode mainOutputMode, SHAL_Timer_Channel_Complimentary_Output_Mode complimentaryOutputMode);
void setPWMMode(SHAL_Timer_Channel channel, SHAL_TIM_Output_Compare_Mode outputCompareMode, SHAL_Timer_Channel_Main_Output_Mode mainOutputMode, SHAL_Timer_Channel_Complimentary_Output_Mode complimentaryOutputMode);
/// Set the duty cycle for PWM
/// \param dutyCycle 10 * percentage (e.g. 500 = 50%)
void setPWMDutyCycle(uint32_t dutyCycle);
//Set TIMER_KEY IRQ callback function
void setCallbackFunc(TimerCallback callback){
@@ -52,6 +56,7 @@ private:
Timer_Key m_key;
};

12
SHAL/Include/Peripheral/Timer/SHAL_TIM_TYPES.h
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@@ -59,15 +59,15 @@ struct SHAL_TIM_Capture_Compare_Mode_Registers_Input {
struct SHAL_TIM_Capture_Compare_Mode_Registers_Output {
volatile uint32_t* regs[2];
uint32_t capture_compare_1_selection_offset;
uint32_t output_compare_1_fast_enable_offset;
uint32_t output_compare_1_preload_enable_offset;
uint32_t output_compare_1_fast_enable_mask;
uint32_t output_compare_1_preload_enable_mask;
uint32_t output_compare_1_mode_offset;
uint32_t output_compare_1_clear_enable_offset;
uint32_t output_compare_1_clear_enable_mask;
uint32_t capture_compare_2_selection_offset;
uint32_t output_compare_2_fast_enable_offset;
uint32_t output_compare_2_preload_enable_offset;
uint32_t output_compare_2_fast_enable_mask;
uint32_t output_compare_2_preload_enable_mask;
uint32_t output_compare_2_mode_offset;
uint32_t output_compare_2_clear_enable_offset;
uint32_t output_compare_2_clear_enable_mask;
};
struct SHAL_TIM_Break_Dead_Time_Register {