Changed UART reg structs

This commit is contained in:
2025-09-07 01:57:22 -07:00
parent 40ee0e6834
commit 465055fc53
10 changed files with 249 additions and 60 deletions

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@@ -28,7 +28,6 @@
#elif defined(STM32F071xB)
#include "stm32f071xb.h"
#elif defined(STM32F072xB)
#include "stm32f072xb.h"
#include "SHAL_GPIO_REG_F072xB.h"
#elif defined(STM32F078xx)
#include "stm32f078xx.h"

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@@ -29,40 +29,7 @@ enum class GPIO_Key : uint8_t {
INVALID
};
//Valid usart Tx and Rx pairings for STM32F072
enum class UART_Pair : uint8_t{
//UART1
Tx1A9_Rx1A10,
Tx1B6_Rx1B7,
//UART2
Tx2A2_Rx2A3,
Tx2A14_Rx2A15,
//UART3
Tx3B10_Rx3B11,
Tx3C4_Rx3C5,
Tx3C10_Rx3C11,
//UART4
Tx4A0_Rx4A1,
Tx4C10_Rx4C11
};
constexpr SHAL_UART_Pair getUARTPair(const UART_Pair pair){
switch(pair){
case UART_Pair::Tx1A9_Rx1A10: return {USART1,9,10,&GPIOA->AFR[1],&GPIOA->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx1B6_Rx1B7: return {USART1,6,7,&GPIOB->AFR[0],&GPIOB->AFR[0],AF_Mask::AF0,AF_Mask::AF0};
case UART_Pair::Tx2A2_Rx2A3: return {USART2,2,3,&GPIOA->AFR[0],&GPIOA->AFR[0],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx2A14_Rx2A15: return {USART2,14,15,&GPIOA->AFR[1],&GPIOA->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx3B10_Rx3B11: return {USART3,10,11,&GPIOB->AFR[1],&GPIOB->AFR[1],AF_Mask::AF4,AF_Mask::AF4};
case UART_Pair::Tx3C4_Rx3C5: return {USART3,4,5,&GPIOC->AFR[0],&GPIOC->AFR[0],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx3C10_Rx3C11: return {USART3,10,11,&GPIOC->AFR[1],&GPIOC->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx4A0_Rx4A1: return {USART4,0,1,&GPIOA->AFR[0],&GPIOA->AFR[0],AF_Mask::AF4,AF_Mask::AF4};
case UART_Pair::Tx4C10_Rx4C11: return {USART4,10,11,&GPIOC->AFR[1],&GPIOC->AFR[1],AF_Mask::AF0,AF_Mask::AF0};
}
}
constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){
switch(g) {

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@@ -14,27 +14,6 @@ struct SHAL_EXTIO_Register{
IRQn_Type IRQN;
};
enum class AF_Mask : uint8_t{
AF0 = 0x00,
AF1 = 0x01,
AF2 = 0x02,
AF3 = 0x03,
AF4 = 0x04,
AF5 = 0x05,
AF6 = 0x06,
AF7 = 0x07
};
//Represents a pair of pins usable for USART Tx + Rx in combination, and their alternate function mapping
struct SHAL_UART_Pair{
USART_TypeDef* USARTReg;
uint8_t TxPinNumber;
uint8_t RxPinNumber;
volatile uint32_t* TxReg;
volatile uint32_t* RxReg;
AF_Mask TxMask;
AF_Mask RxMask;
};
#endif //SHMINGO_HAL_SHAL_GPIO_TYPES_H